Workshop · In-person · HC2.005, Burwood (Elgar Rd)

About
The full rundown for Physical AI Workshop.
DSEC's Physical AI Meetup brought industry and research speakers to Deakin Burwood to explore Physical AI — the models, hardware and compute that let AI perceive, decide and act in the real world.
Run in collaboration with an external organiser, the evening featured short talks spanning robotics, on-device AI and the silicon beneath it — from zero-code robotic manufacturing to co-designing models, kernels and chips — followed by networking. See the speaker line-up and photos below.
Speakers
The people sharing what they know at Physical AI Workshop.

Confirmed speaker via Jason (Physical AI organiser), 2026-08-07. 20-minute presentation slot. LinkedIn: https://www.linkedin.com/in/simindokht-jahangard-3009504b/ ⚠️ Name taken from the LinkedIn URL — job title, employer and bio NOT yet confirmed. Ask Jason for a speaker bio + talk title before publishing to the website or socials.

AMD
Third speaker, locked in from the AMD side by Jason on 2026-08-07 ("I locked in third speaker from AMD side... His name is Eu Geen"). 20-minute presentation slot. LinkedIn: https://www.linkedin.com/in/eugeenc/ ⚠️ Name spelling is Jason's ("Eu Geen"); the LinkedIn slug is "eugeenc", so this may be Eugene C. Exact spelling, job title and bio NOT yet confirmed — confirm before publishing. AMD affiliation is from Jason's message, not verified.

Project Lead, CSIRO
Confirmed speaker. 20-minute presentation slot. **Talk title (confirmed by Jason 2026-08-02): "Continuous3D: Physical AI for Zero-Code Robotic Manufacturing and Maintenance"** Role per Jason: project lead at CSIRO. LinkedIn: https://www.linkedin.com/in/peter-c-king/ Still needed: written bio for promo copy. Role and topic are from Jason's WhatsApp messages, not from a bio Jason sent — the promised follow-up email has not arrived.

Senior Researcher, University of Sydney
Fourth speaker on the Physical AI Meetup poster/schedule (added 2026-08-31 from the official poster; not previously in the DB). Talk: "Zero Multiply LLMs: Co-Designing Model, Kernel, and Chip." Card blurb: senior researcher at the University of Sydney working on ternary LLMs, RISC-V instruction sets and LLVM — designing the model, the kernel and the chip as one problem. Title/affiliation taken from the poster card; confirm before publishing.